In an integrated amplifier circuit, multiple power supplies are used to bias different circuit blocks of the amplifier circuit. In order to maximize power efficiency and output dynamic range, the output stage of the amplifier circuit is biased with a power supply that is different from the rest of the circuit. The output stage of the amplifier circuit can be of a class D or class AB output stage The DC voltage at the output of the amplifier circuit is normally biased at the mid point of the power rails.
For an amplifier circuit, the signal is feedback from the output to the input of the amplifier circuit. This feedback is for the purpose of having a fixed gain and better THD (Total Harmonic Distortion) performance. The input of the amplifier circuit is normally biased at the mid point of the power rails supplying the input stage of the amplifier circuit. However, the DC level of the output stage is different from the DC level of the input stage. As a result, the DC bias at the inverting and non inverting terminals of the input stage of the amplifier circuit will be at a different level. This may result in a large DC offset at the output of the amplifier circuit and a reduced output dynamic range of the output stage.
FIG. 1 is a block diagram showing a conventional class D PWM amplifier circuit 24. Here the output stage comprises of NMOS power transistors 1 and 2 for illustration only. The transistors could be a bipolar or P/N-type DMOS complementing transistor. The output signal is feedback from the output to the negative terminal of the integrator 6 using resistor 3. Here resistor 3 is for illustration only. The feedback circuit may comprise of a network of transistors and resistors and capacitors. The positive terminal of integrator 6 is biased with HVCC (Mid point of the Output Power Rail).
One problem of this conventional circuit is that HVCC may be too high or too low to be used as input bias. This will result in a decrease in the input dynamic range. It will be even worse if the output power supply is several times the magnitude of the integrator power supply. HVCC may be out of the input dynamic range for the integrator 6.